ASIC Digital Design, Sr Staff Engineer - Verification
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- Tp Hồ Chí Minh
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custom_fields.CareerAreas-ASIC-Digital-Design custom_fields.SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields.unposting_date-2026-12-31 custom_fields.Multikeywordfacets-Hardware">Join our Talent Community! .Find Jobs ForWhere? Search JobsASIC Digital Design, Sr Staff Engineer - VerificationHo Chi Minh City, Ho Chi Minh, VietnamEngineeringEmployeeSave Job ShareJump toOverviewOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.Play VideoJob DescriptionCategory Engineering Hire Type Employee Job ID 13891 Remote Eligible No Date Posted 22/12/2025Alternate Job Titles:
- ASIC Digital Design Staff Engineer
- Digital Verification Staff Engineer
- Staff ASIC Engineer
- Working in a Digital and Verification Development team during the development and validation of complex digital mixed signals for high-speed interface IP.
- Planning tests, checklists, coverage, and assertion planning.
- Creating detailed verification environments from functional specifications.
- Applying advanced verification techniques like constrained random generation, functional coverage, assertions, and formal verification.
- Writing test cases, checkers, and coverage that implement the verification test plan.
- Debugging simulations, including those of real signals modeled using SystemVerilog for analog.
- Performing RTL, GLS, and co-simulations and ensuring coverage closure.
- Participating in technical reviews and contributing actively.
- Providing customer support with the bring-up of IP in customer simulation environments.
- Following and improving development processes to ensure high-quality output.
- Contributing to the development and validation of high-performance digital and mixed-signal IP.
- Ensuring the successful implementation of verification test plans.
- Enhancing the reliability and performance of our products through meticulous debugging and testing.
- Supporting customers in integrating our IP into their systems, ensuring seamless operation.
- Improving development processes to enhance efficiency and output quality.
- Collaborating with a global team of experts, driving innovation and technological advancements.
- BS/MS/PhD in Electronics Engineering, Electromechanics, Telecommunications.
- 8+ years of experience in design verification.
- Strong skills with VCS/Verdi simulation tools and formal verification tools (vc_formal).
- Knowledge of UPF, UVM (Universal Verification Methodology), and SVA (SystemVerilog Assertion) is a plus.
- Proficiency in debugging and demonstrated experience in Perl/TCL/Python scripting is a plus.
- Highly responsible and result-oriented.
- Excellent English communication skills, both verbal and written.
- A great team player, willing to support others.
- Self-motivated and highly enthusiastic about technology and solving problems.