
Principal Engineer, Physical Design
- Tp Hồ Chí Minh
- Lâu dài
- Toàn thời gian
- Good Understanding of RTL, Synthesis, LEC, VCLP, Timing Constraints Generation, UPF, Timing Closure and Signoff.
- Develop TCL scripts and design constraints to perform synthesis, DFT insertion, and static timing analysis.
- Interface for DFT strategy and implementation.
- Responsible for design convergence in timing and logic equivalence.
- Experience with EDA tools like Genus, Fusion Compiler, Primetime, Tempus, LEC, VCLP.
- Knowledge of scripting languages such as Perl, Python, or TCL.
- Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things.
- Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people's lives easier, safe and secure.
- Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day.
- Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things.
- Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people's lives easier, safe and secure.
- Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day.